Photolithography processes for manufacturing semiconductor devices and liquid crystal displays (LCD's) generally coat a resist on a substrate, expose the resist coating to light to impart a latent image pattern, and develop the exposed resist coating to transform the latent image pattern into a final image pattern having masked and unmasked areas. Such a series of processing stages is typically carried out in a coating/developing system having discrete heating sections, such as a pre-baking unit and a post-baking unit. Each heating section of the coating/developing system may incorporate a hotplate with a built-in heater of, for example, a resistance heating type.
Feature sizes of semiconductor device circuits have been scaled to less than 0.1 micron. Typically, the pattern wiring that interconnects individual device circuits is formed with sub-micron line widths. Consequently, the heat treatment temperature of the resist coating should be accurately controlled to provide reproducible and accurate feature sizes and line widths. The substrates or wafers (i.e., objects to be treated) are usually treated or processed under the same recipe (i.e., individual treatment program) in units (i.e., lots) each consisting of, for example, twenty-five wafers. Individual recipes define heat treatment conditions under which pre-baking and post-baking are performed. Wafers belonging to the same lot are heated under the same conditions.
According to each of the recipes, the heat treatment temperature may be varied within such an acceptable range that the temperature will not have an effect on the final semiconductor device. In other words, a desired temperature may differ from a heat treatment temperature in practice. When the wafer is treated with heat beyond the acceptable temperature range, a desired resist coating cannot be obtained. Therefore, to obtain the desired resist coating, a temperature sensor is used for detecting the temperature of the hotplate. On the basis of the detected temperature, the power supply to the heater may be controlled with reliance on feedback from the temperature sensor. Because the temperature of the entire hotplate is not uniform and varies with the lapsed time, however, it is difficult to instantaneously determine the temperature of the hotplate using a single temperature sensor.
The post exposure bake (PEB) process is a thermally activated process and serves multiple purposes in photoresist processing. First, the elevated temperature of the bake drives the diffusion of the photoproducts in the resist. A small amount of diffusion may be useful in minimizing the effects of standing waves, which are the periodic variations in exposure dose throughout the depth of the resist coating that result from interference of incident and reflected radiation. Another main purpose of the PEB is to drive an acid-catalyzed reaction that alters polymer solubility in many chemically amplified resists. PEB also plays a role in removing solvent from the wafer surface.
Chemical amplification allows a single photoproduct to cause many solubility-switching reactions, thus increasing the sensitivity of these photoresist systems. Some amount of acid transport is necessary in that it allows a single acid to move to many reactive polymer sites. However, acid transport from nominally exposed to unexposed regions can complicate control of resist feature dimensions. Acid transport through these reactive systems is mechanistically complex. Measurements have shown that there is a very large difference in acid mobility between the starting material, which is reactive towards acid, and the product material, which is no longer reactive.
In addition to the intended results, numerous problems may be observed during heat treatment. For example, the light sensitive component of the resist may decompose at temperatures typically used to remove the solvent, which is a concern for a chemically amplified resist because the remaining solvent content has a strong impact on the diffusion and amplification rates. Also, heat-treating can affect the dissolution properties of the resist and, thus, have direct influence on the developed resist profile.
Hot plates having uniformities within a range of a few tenths of a degree centigrade are currently available and are generally adequate for current process methods. Hotplates are calibrated using a flat bare silicon wafer with imbedded thermal sensors. However, actual production wafers carrying deposited films on the surface of the silicon may exhibit small amounts of warpage because of the stresses induced by the deposited films. This warpage may cause the normal gap between the wafer and the hot plate, often referred to as a proximity gap, to vary across the wafer from a normal value of approximately 100 μm by as much as a 100 μm deviation from the mean proximity gap. Consequently, actual production wafers may have different heating profiles than the wafer used to calibrate the hotplate.
This variability in the proximity gap changes the heat transfer characteristics in the area of the varying gap causing temperature non-uniformity on the wafer surface. This temperature difference may result in a change in critical dimension (CD) in that area of several nanometers, which can approach the entire CD variation budget for current leading edge devices, and will exceed the projected CD budget for smaller devices planned for production in the next few years.
What is needed, therefore, are apparatus and methods for heating a substrate during a thermal processing system that are tolerant variances in the proximity gap.